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SY88315BL
3.3V, 3.2Gbps CML Low-Power Limiting Post Amplifier w/TTL Signal Detect
General Description
The SY88315BL low-power limiting post amplifier is designed for use in fiber-optic receivers. The device connects to typical transimpedance amplifiers (TIAs). The linear signal output from TIAs can contain significant amounts of noise and may vary in amplitude over time. The SY88315BL quantizes these signals and outputs CML level waveforms. The SY88315BL operates from a single +3.3V +10% power supply, over temperatures ranging from -40oC to +85oC. With its wide bandwidth and high gain, signals with data rates up to 3.2Gbps and as small as 10mVPP can be amplified to drive devices with CML inputs or ACcoupled CML/PECL inputs. The SY88315BL generates a signal-detect (SD) opencollector TTL output. A programmable signal-detect level set pin (SDLVL) sets the sensitivity of the input amplitude detection. SD asserts high if the input amplitude rises above the threshold set by SDLVL and de-asserts low otherwise. The enable input (EN) de-asserts the true output signal without removing the input signal. The SD output can be fed back to the EN input to maintain output stability under loss-of-signal condition. Typically, 3.4dB SD hysteresis is provided to prevent chattering. Datasheet and support documentation cab be found on Micrel's web site at: www.micrel.com.
Features
* * * * * * * * * Single 3.3V power supply DC to 3.2Gbps operation Low-noise CML data outputs Chatter-free Open-Collector TTL signal detect (SD) output with internal 4.75k pull-up resistor TTL EN input Internal 50 input termination Programmable SD level set (SDLVL) Ideal for multi-rate applications Available in a tiny 10-pin EPAD MSOP and 16-pin MLF(R) package
Applications
* * * * * APON/BPON, EPON, and GPON Gigabit Ethernet Fibre Channel OC-3 and OC-12/24 SONET/SDH High-gain line driver and line receiver
Markets
* * * * FTTP Optical transceivers Datacom/telecom Low-gain TIA interface
MLF and MicroLeadFrame are registered trademarks of Amkor Technology. Micrel Inc. * 2180 Fortune Drive * San Jose, CA 95131 * USA * tel +1 (408) 944-0800 * fax + 1 (408) 474-1000 * http://www.micrel.com
February 2007
M9999-021207-D hbwhelp@micrel.com or (408) 955-1690
Micrel, Inc.
SY88315BL
Typical Application
Pin Configuration
16-Pin MLF(R) (MLF-16)
10-Pin EPAD-MSOP (K10-2)
Ordering Information
Part Number SY88315BLEY SY88315BLEYTR SY88315BLMG SY88315BLMGTR(1) Note: 1. Tape and Reel.
(1)
Package Type K10-2 K10-2 MLF-16 MLF-16
Operating Range Industrial Industrial Industrial Industrial
Package Marking 315B with Pb-Free bar line indicator 315B with Pb-Free bar line indicator 315B with Pb-Free bar line indicator 315B with Pb-Free bar line indicator
Lead Finish Matte-Sn Matte-Sn NiPdAu Pb-Free NiPdAu Pb-Free
November 2005
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Micrel, Inc.
SY88315BL
Pin Description
Pin Number (MSOP) 1 2 3 4 5 6 Exposed Pad 7 8 9 10 Pin Number (MLF(R)) 15 1 4 6 14 2, 3, 10, 11 Exposed Pad 7 9 12 5, 8, 13, 16 Pin Name EN DIN /DIN VREF SDLVL GND Input: Default is maximum sensitivity Ground Open Collector TTL Output with Internal 4.75k pull-up Resistor CML Output CML Output Power supply Type TTL Input: Default is high. Data Input Data Input Pin Function Enable: De-asserts true data output when LOW. True data input w/50 termination to VREF. Complementary data input w/50 termination to VREF. Reference Voltage: Placing a capacitor here to VCC helps stabilize SDLVL. Signal-detect Level Set: A resistor from this pin to VCC sets the threshold for the data input amplitude at which the SD output will be asserted. Device ground. Exposed pad must be connected to PCB ground plane. Signal-detect: Asserts high when the data input amplitude rises above the threshold set by SDLVL. Complementary data output. True data output. Positive power supply.
SD /DOUT DOUT VCC
November 2005
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Micrel, Inc.
SY88315BL
Absolute Maximum Ratings(1)
Supply Voltage (VCC) .................................... 0V to +4.0V Input Voltage (DIN, /DIN) ................................... 0 to VCC Output Current (IOUT) ............................................+25mA EN Voltage ......................................................... 0 to VCC VREF Current ...........................................................+1mA SDLVL Voltage ................................................ VREF to VCC Lead Temperature (soldering, 20sec.) .................. 260C Storage Temperature (Ts) .....................-65C to +150C
Operating Ratings(2)
Supply Voltage (VCC).................................+3.0V to +3.6V Ambient Temperature (TA) .......................-40C to +85C Junction Temperature (TJ) .....................-40C to +120C Junction Thermal Resistance MLF(R) (JA) Still-air ................................................ 61C/W (JB)............................................................ 38C/W EPAD-MSOP (JA) Still-air ................................................ 38C/W (JB)............................................................ 22C/W
DC Electrical Characteristics
VCC = 3.0V to 3.6V; RLOAD = 50 to VCC; TA = -40C to +85C.
Symbol ICC SDLVL VOH VOL VOFFSET ZO ZI VREF Parameter Power Supply Current SDLVL Voltage CML Output HIGH Voltage CML Output LOW Voltage Differential Output Offset Single-Ended Output Impedance Single-Ended Input Impedance Reference Voltage 40 40 50 50 VCC-1.28 VCC = 3.3V Condition No output load VREF VCC-0.020 VCC-0.005 Min Typ 47 Max 65 VCC VCC +80 60 60 Units mA V V V mV V
VCC-0.475 VCC-0.400 VCC-0.350
TTL DC Electrical Characteristics
VCC = 3.0V to 3.6V; RLOAD = 50 to VCC; TA = -40C to +85C.
Symbol VIH VIL IIH IIL VOH VOL
Notes: 1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings. 3. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the device's most negative potential (GND) on the PCB. JB uses 4-layer (JA) in still-air-number, unless otherwise stated.
Parameter EN Input HIGH Voltage EN Input LOW Voltage EN Input HIGH Current EN Input LOW Current SD Output HIGH Level SD Output LOW Level
Condition
Min 2.0
Typ
Max 0.8
Units V V A A mA V V
VIN = 2.7V VIN = VCC VIN = 0.5V VCC > 3.3V, IOH-MAX < 160uA VCC < 3.3V, IOH-MAX < 160uA IOL = +2mA -0.3 2.4 2.0
20 100
0.5
V
November 2005
4
M9999-113005-C hbwhelp@micrel.com or (408) 955-1690
Micrel, Inc.
SY88315BL
AC Electrical Characteristics
VCC = 3.0V to 3.6V; RLOAD = 50 to VCC; TA = -40C to +85C.
Symbol tr, tf tJITTER VID VOD TOFF TON SDAL SDDL HYSL SDAM SDDM HYSM SDAH SDDH HYSH B-3dB AV(Diff) S21 Parameter Output Rise/Fall Time (20% to 80%) Deterministic Random Differential Input Voltage Swing Differential Output Voltage Swing SD Release Time SD Assert Time Low SD Assert Level Low SD De-assert Level Low SD Hysteresis Medium SD Assert Level Medium SD De-assert Level Medium SD Hysteresis High SD Assert Level High SD De-assert Level High SD Hysteresis 3dB Bandwidth Differential Voltage Gain Single-ended Small-Signal Gain 32 26 RSDLVL = 15k, Note 8 RSDLVL = 15k, Note 8 RSDLVL = 15k, Note 7 RSDLVL = 5k, Note 8 RSDLVL = 5k, Note 8 RSDLVL = 5k, Note 7 RSDLVL = 100, Note 8 RSDLVL = 100, Note 8 RSDLVL = 100, Note 7 30 2 10 2 Condition Note 4 Note 5 Note 6 Figure 1 VID > 18mVPP Figure 1 10 700 800 2 2 12 7.8 3.7 25 17 3.3 69 45 3.7 2 38 32 4.5 4.5 95 40 Min Typ 60 15 5 1800 950 10 10 Max 120 Units ps psPP psRMS mVPP mVPP s s mVPP mVPP dB mVPP mVPP dB mVPP mVPP dB GHz dB dB
Notes: 4. Amplifier in limiting mode. Input is a 200MHz square wave. 5. Deterministic jitter measured using 3.2Gbps K28.5 pattern, VID = 10mVPP. 6. Random jitter measured using 3.2Gbps K28.7 pattern, VID = 10mVPP. 7. This specification defines electrical hysteresis as 20log (SD Assert/SD De-assert). The ratio between optical hysteresis and electrical hysteresis is found to vary between 1.5 and 2 depending upon the level of received optical power and ROSA characteristics. Based on that ratio, the optical hysteresis corresponding to the electrical hysteresis range 2dB-4.5dB, shown in the AC characteristics table, will be 1dB-3dB Optical Hysteresis. 8. See "Typical Operating Characteristics" for a graph showing how to choose a particular RSDLVL for a particular SD assert and its associated de-assert amplitude.
November 2005
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M9999-113005-C hbwhelp@micrel.com or (408) 955-1690
Micrel, Inc.
SY88315BL
Typical Characteristics
RSDLVL (k)
November 2005
6
M9999-113005-C hbwhelp@micrel.com or (408) 955-1690
Micrel, Inc.
SY88315BL
Functional Diagram
Detailed Description
The SY88315BL low-power limiting post amplifier operates from a single +3.3V power supply, over temperatures from -40oC to +85oC. Signals with data rates up to 3.2Gbps and as small as 5mVPP can be amplified. Figure 1 shows the allowed input voltage swing. The SY88315BL generates an SD output. SDLVL sets the sensitivity of the input amplitude detection. Input Amplifier/Buffer Figure 2 shows a simplified schematic of the SY88315BL's input stage. The high-sensitivity of the input amplifier allows signals as small as 10mVPP to be detected and amplified. The input amplifier also allows input signals as large as 1800mVPP. Input signals are linearly amplified with a typical 38dB differential voltage gain. Since it is a limiting amplifier, the SY88315BL outputs typically 800mVPP voltage-limited waveforms for input signals that are greater than 12mVPP. Applications requiring the SY88315BL to operate with high-gain should have the upstream TIA placed as close as possible to the SY88315BL's input pins to ensure the best performance of the device. Output Buffer The SY88315BL's CML output buffer is designed to drive 50 lines. The output buffer requires appropriate termination for proper operation. An external 50 resistor to VCC for each output pin provides this. Figure 3 shows a simplified schematic of the output stage.
Signal-Detect The SY88315BL generates a chatter-free SD opencollector TTL output with an internal 4.75k pull-up resistor as shown in Figure 4. SD is used to determine that the input amplitude is large enough to be considered a valid input. SD asserts high if the input amplitude rises above the threshold set by SDLVL and de-asserts low otherwise. SD can be fed back to the enable (EN) input to maintain output stability under a loss of signal condition. EN de-asserts the true output signal without removing the input signals. Typical 3.4dB SD hysteresis is provided to prevent chattering. Signal-Detect Level Set A programmable SD level set pin (SDLVL) sets the threshold of the input amplitude detection. Connecting an external resistor between VCC and SDLVL sets the voltage at SDLVL. This voltage ranges from VCC to VREF. The external resistor creates a voltage divider between VCC and VREF as shown in Figure 5 Hysteresis The SY88315BL provides typically 3.4dB SD electrical hysteresis. By definition, a power ratio measured in dB is 10log (power ratio). Power is calculated as V2IN/R for an electrical signal. Hence the same ratio can be stated as 20log (voltage ratio). While in linear mode, the electrical voltage input changes linearly with the optical power and therefore, the ratios change linearly. Thus, the optical hysteresis in dB is half the electrical hysteresis in dB given in the data sheet. Since the SY88315BL is an electrical device, this data sheet refers to hysteresis in electrical terms. With 3.4dB SD hysteresis, a voltage factor of 1.5 is required to assert or de-assert SD. 7
M9999-113005-C hbwhelp@micrel.com or (408) 955-1690
November 2005
Micrel, Inc.
SY88315BL
Figure 1. VIS and VID Definition
Figure 2. Input Structure
Figure 3. Output Structure
Figure 5. SD Output Structure
Figure 4. Power Supply Current Measurement
Figure 6. SDLVL Setting Circuit
November 2005
8
M9999-113005-C hbwhelp@micrel.com or (408) 955-1690
Micrel, Inc.
SY88315BL
Package Information
10-Pin EPAD-MSOP
November 2005
9
M9999-113005-C hbwhelp@micrel.com or (408) 955-1690
Micrel, Inc.
SY88315BL
16-Pin MLF(R) (MLF-16)
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com
The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser's use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser's own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. (c) 2005 Micrel, Incorporated.
November 2005
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